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RISC-V Instructions @ItsABitRISCV

Tweets about the RISC-V Instruction Set Architecture (ISA). #riscv Not affiliated with RISC-V International. Earth & Low Orbit Joined May 2020
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ItsABitRISCV Profile Picture

RISC-V Instructions @ItsABitRISCV

2 years ago

When they want to build $350 XR headsets and not $3500 ones? 🙃

cyberpengk Profile Picture

ZILIANG Peng 🏴‍☠️ @cyberpengk

2 years ago

When they want to build $350 XR headsets and not $3500 ones? 🙃

RISC-V Instructions retweeted
sallywf Profile Picture

Sally Ward-Foxton @sallywf

2 years ago

The next gen Xcore will be compatible with RISC-V (but is not a RISC-V core). "It became obvious RISC-V is here to stay and that our customers would value... all the tools and facilities that came along with it." #ai #xcore #xmos #edgeai #aiot #riscv eetimes.com/xmos-joins-ris…

RISC-V Instructions retweeted
risc_v Profile Picture

RISC-V International @risc_v

2 years ago

📍Barcelona, Spain #RISCVSUMMITEUROPE starts tomorrow! Will you be joining us? #RISCV #RISCVEverywhere

RISC-V Instructions retweeted
mips_riscv Profile Picture

MIPS @mips_riscv

2 years ago

Calling all RISC-V Summit Europe attendees! Stop by Booth 10 in Meeting Room 5+6 to learn more about MIPS' eVocore IP cores so you can have the scalability and configurability you need to meet your specific application requirements. #cpus #riscvsummiteurope #mips #riscv

RISC-V Instructions retweeted
eeNewsEurope Profile Picture

eeNews Europe @eeNewsEurope

2 years ago

Complete RISC-V analog IP subsystem targets IoT // eenewseurope.com/en/complete-ri… @AgileAnalog @risc_v @Calista_Redmond

RISC-V Instructions retweeted
tomshardware Profile Picture

Tom's Hardware @tomshardware

2 years ago

Newly Revealed RISC-V Vector Unit Could Be Used for AI, HPC, GPU Applications trib.al/UBJNxeU

ItsABitRISCV Profile Picture

RISC-V Instructions @ItsABitRISCV

2 years ago

Isn't that what people did with Arm for the first decade? kek

DeerFloat Profile Picture

🦌DeerFloat (Heavy)🦌 @DeerFloat

2 years ago

Isn't that what people did with Arm for the first decade? kek

RISC-V Instructions retweeted
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Ventana Micro Systems @VentanaMicro

2 years ago

Don't miss the Ventana team's Six Five Summit session "Leadership in Action, Delivering World’s Highest Performance RISC-V processors for Datacenter, Automotive and Generative AI" June 6 @ 12:30pm PT #SixFiveSummit bit.ly/3IOioZ7

RISC-V Instructions retweeted
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Ventana Micro Systems @VentanaMicro

2 years ago

Ventana’s Founder and CEO Balaji Baktha will be at the RISC-V Summit Europe tomorrow to deliver the keynote speech "Paving the Road Ahead: RISC-V and Chiplet Technologies in Modern Automotive and Data Center Architectures." Register for the conference at bit.ly/3Mxbjy7

RISC-V Instructions retweeted
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Linux.com @linuxdotcom

2 years ago

Linux Foundation & RISC-V International Launch RISC-V Fundamentals Course - linux.com/news/linux-fou…

RISC-V Instructions retweeted
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embedded.com @embedded_online

2 years ago

SiFive donates WorldGuard open model to enable security on RISC-V embedded.com/sifive-donates…

RISC-V Instructions retweeted
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PlatformIO @PlatformIO_Org

2 years ago

#LearnEmbedded 🎓 "PlatformIO Labs Helps Imagination Technologies Improve RISC-V Computer Architecture Training" The new course removes barriers while working with RISC-V IP Cores and FPGAs 👉 piolabs.com/blog/press-rel… 📌 #OpenSource #EmbeddedSystems #Electronics #Semiconductor

RISC-V Instructions retweeted
risc_v Profile Picture

RISC-V International @risc_v

2 years ago

Come visit the #RISCV Zone at @60thDAC, taking place from July 9-13 in Moscone West, San Francisco! Learn more and register here: hubs.ly/Q01NH8pq0 #RISCVeverywhere

RISC-V Instructions retweeted
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IEEE Symposium on VLSI Technology and Circuits @VLSI_2025

2 years ago

#VLSI2023 Circuits Highlight C3-4 Power of the end-to-end system w/o image sensor is 0.62 & 1.61mW for 2 and 15fps, respectively. Figure: An SoC prototype comprised of a DCIM-base Deep Learning accelerator, RISC-V microprocessor, & interface for off-chip image sensor connection.

RISC-V Instructions retweeted
risc_v Profile Picture

RISC-V International @risc_v

2 years ago

Applications for our #RISCV summer #mentorship program are open! We have four available positions, including one non-technical role. Apply by Monday, May 15: hubs.la/Q01NHnfX0 #RISCVeverywhere

RISC-V Instructions retweeted
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John Round @openhwsw

2 years ago

** 432-Core Chiplet-Based RISC-V Chip Nearly Ready to Blast Into Space #riscv lnkd.in/gfWAFbk5

RISC-V Instructions retweeted
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Cadence System Design and Analysis @CadenceSDA

2 years ago

Chip design and development carries big budgets that come with a licensing fee for an ISA and core architecture. RISC-V is changing this dynamic by democratizing the chip design process while providing a modular path forward for new hardware. bit.ly/3LGteT9 #Cadence

RISC-V Instructions retweeted
risc_v Profile Picture

RISC-V International @risc_v

2 years ago

.@risc_v CEO @Calista_Redmond will be giving a #keynote at this year’s Open Source Summit North America! Join us at #OSSummit from May 10-12 virtually and in Vancouver, Canada: hubs.la/Q01MYxs10 @linuxfoundation #RISCVeverywhere

RISC-V Instructions retweeted
risc_v Profile Picture

RISC-V International @risc_v

2 years ago

Join #RISCV at @60thDAC! We will be showcasing the power of open collaboration at the #RISCVZone. @risc_v CEO @Calista_Redmond will also be moderating a panel with leaders from @amazon, @ImperasSoftware, @intel, @Meta, and @openhwgroup. Learn more: hubs.la/Q01MYH7s0

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