Art Swift @aswiftceo
Running, climbing, skiing, CEO. Interests: #MachineLearning, #AI, #IoTsecurity, #opensource, higher education for all Joined May 2014-
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Art Swift retweeted
How does @EsperantoTech’s #ML inference accelerator with #RISCV processors combine energy efficiency with high performance? Dave Ditzel reveals the new ET-SoC-1 featuring over 1,000 RISC-V custom processor cores: bit.ly/3ARizwH @hotchipsorg
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Compared to just a couple of years ago, RISC-V momentum is really growing. Having high end RISC-V based chips coming available has undoubtedly helped! @EsperantoTech #AI #ML
Compared to just a couple of years ago, RISC-V momentum is really growing. Having high end RISC-V based chips coming available has undoubtedly helped! @EsperantoTech #AI #ML
Art Swift retweeted
Did you miss Esperanto Technologies at Hot Chips 2021 today? You can now download slides from Dave Ditzel’s presentation here: esperanto.ai/wp-content/upl…
Art Swift retweeted
Esperanto AI Accelerator Featured in Forbes! #AI #ML #RISCV @hotchipsorg @risc_v See esperanto.ai/esperanto-ai-a…
Art Swift retweeted
At #HotChips, AI startup @EsperantoTech indicated that has its first chip and provided more detail on the chip architecture. Read more about it from @tiriasresearch in @Forbes at bit.ly/3sJVLM2
Esperanto Emerges From Stealth With 1,000-Core RISC-V AI Accelerator eetimes.com/esperanto-emer…
Art Swift retweeted
Don’t miss this opportunity! @EsperantoTech Founder, @DaveDitzel will speak on accelerating #ML recommendation at #HotChips2021 on August 24 at 8:30 a.m. PT! Learn more here: hubs.la/H0VL7Yd0 #RISCV
A Look At The ET-SoC-1, Esperanto’s Massively Multi-Core RISC-V Approach To AI – WikiChip Fuse fuse.wikichip.org/news/4911/a-lo…
Art Swift retweeted
Esperanto Technologies to Reveal Chip with 1000+ Cores at RISC-V Summit! Art Swift, CEO of @EsperantoTech, will present chip that accelerates Machine Learning based on RISC-V ISA #ML #AI #DL @riscv_a @risc_v @aswiftceo esperanto.ai/esperanto-tech…
Art Swift retweeted
Esperanto Technologies Secures $58 Million in Series B Investment for AI Chips! Accelerating Development of 7nm Semiconductor Solutions for #AI and #ML. esperanto.ai/esperanto-tech…
Cool to see this! I first heard of this at your @BlackHatEvents preso in 2016. I hope IoT, embedded, and AI SW will be next. Congrats!
Cool to see this! I first heard of this at your @BlackHatEvents preso in 2016. I hope IoT, embedded, and AI SW will be next. Congrats!
Interesting article by @Chip_Insider on Security Holes In Machine Learning And AI semiengineering.com/security-holes…
Art Swift retweeted
Latest attempt to help make the world safe for open hardware: eetimes.com/author.asp?sec…
Art Swift retweeted
My talk on protecting against timing attacks (like Spectre) in the micro-architecture is now available (youtube.com/watch?v=yvaFpN…), slides available at (riscv.org/2018/05/risc-v…).
Art Swift retweeted
UltraSoC analytics IP selected by @EsperantoTech for #RISC-V many-core parallel processing in AI and ML applications @UltraSoC @risc_v globenewswire.com/news-release/2…
Art Swift retweeted
NetSpeed and Esperanto Partner to Power SoCs for Artificial Intelligence @risc_v #RISCV prnewswire.com/news-releases/…
Art Swift retweeted
Welp, it turns out the #Meltdown patches for Windows 10 had a fatal flaw: calling NtCallEnclave returned back to user space with the full kernel page table directory, completely undermining the mitigation. This is now patched on RS4 but not earlier builds -- no backport??
If you're attending the RISC-V workshop in Barcelona next week, please plan on meeting the Esperanto team.
If you're attending the RISC-V workshop in Barcelona next week, please plan on meeting the Esperanto team.
Art Swift retweeted
Roger Espasa, Chief Architect @EsperantoTech, will deliver a tutorial and presentation @risc_v Workshop Barcelona on updates to the “Vector ISA” specification. @RogerEspasa #RISCV tmt.knect365.com/risc-v-worksho…
Norseman @Shate970141
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