nand2mario @nand2mario

FPGA and retro gaming dev. Author of NESTang and SNESTang. github.com/nand2mario Joined August 2022

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nand2mario @nand2mario

3 days ago

CPU speed is not enough - much higher than the previous PCXT core though. Video performance is OK, benefited by the BRAM-back video RAM. Let's see what I can optimize. I can think of a few tricks...

CPU speed is not enough - much higher than the previous PCXT core though. Video performance is OK, benefited by the BRAM-back video RAM. Let's see what I can optimize. I can think of a few tricks... https://t.co/6vi8JZHeGc

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BNinja @Bedroom_Ninja

7 days ago

I’m off to Copenhagen for a week tomorrow, taking the #TangFPGA with me for some NES/SNES fun after the family’s gone to bed! Which colour shell looks best, Red vs Blue? Thanks to @nand2mario for the amazing #TangCore! Not bad for ~$40

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nand2mario @nand2mario

2 weeks ago

First VGA mode 3 screen from the x86 core. 🎉 Much more work ahead.

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nand2mario @nand2mario

4 weeks ago

Progress getting x86 core to compile on tang console 60k. Done: cpu, vga memory moved to sdram from bram, main memory in ddr3, hard disk on sd card. Todo: L2 cache, ps2 keyboard, sound card.😜

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nand2mario @nand2mario

2 months ago

1993 mars.exe demo running under ao486-sim. `demo\mars.exe` on the dos6.vhd virtual disk.

nand2mario @nand2mario

2 months ago

1993 mars.exe demo running under ao486-sim. `demo\mars.exe` on the dos6.vhd virtual disk. https://t.co/UouCE3XGoX

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nand2mario @nand2mario

2 months ago

Just pushed an update to allow persisting of hard disk writes by pressing the CMD-s or WIN-s key, with the help of SystemVerilog DPI. Now the QBasic or Turbo C programs you write are actually saved. :)

nand2mario @nand2mario

2 months ago

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nand2mario @nand2mario

2 months ago

True. It’s more of a by-product of getting ao486 to work on non-Intel FPGAs. Also RTL simulations are “closer to the silicon” and better for learning hardware/chip designs.

Marcus/Boogermann @marcusjordan

2 months ago

True. It’s more of a by-product of getting ao486 to work on non-Intel FPGAs. Also RTL simulations are “closer to the silicon” and better for learning hardware/chip designs.

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nand2mario @nand2mario

2 months ago

Introducing ao486-sim 🚀 - `make sim` and watch the ao486 Verilog CPU booting DOS 6.22. A good tool for learning CPU design and how PCs work in general. Github: github.com/nand2mario/ao4…

nand2mario @nand2mario

2 months ago

Introducing ao486-sim 🚀 - `make sim` and watch the ao486 Verilog CPU booting DOS 6.22. A good tool for learning CPU design and how PCs work in general. Github: github.com/nand2mario/ao4… https://t.co/y7UhfeluMQ

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nand2mario @nand2mario

2 months ago

DOS 6.22, in ao486 simulation, running on Mac at 0.7 FPS. 🤪 Now I can compare my z86 with ao486.

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YRabbit @YLRabbit

2 months ago

Ladies and gentlemen! The first design for the #gowin GW5A chip series to fully pass the whole Yosys->Nextpnr->Apicula->working-board chain!🍾 🍾 🍾 The design itself is nothing to write home about - just an inversion of the LED button, #fpga #sipeed #gowin #apicula

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nand2mario @nand2mario

2 months ago

OK I've uploaded my from-scratch 80286-like softcore CPU to github: github.com/nand2mario/z86 🚀 It is still a WIP. But it should be fairly complete, at least in simulation. 5-stage pipeline design like the 80486: Fetch, Decode1, Decode2, Execute, Write-Back.

nand2mario @nand2mario

2 months ago

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nand2mario @nand2mario

2 months ago

My 286-class CPU (real-mode only) is finally working in sim and we have PC-AT BIOS, VGA and IBM Basic working.😀 The CPU is written from scratch and uses a 5-stage pipeline, aiming to be fast enough to run early 90's games. The final core will be in between ao486 and PCXT_MiSTer.