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SystemC retweeted
Do join us on TODAY (Dec 21) at 8.30 pm for a webinar on ‘Semiconductors: India’s $10 Billion Opportunity”. Excellent panel comprising of subject matter experts. Catch the session live at youtu.be/mYQkhL2K4y8
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SystemC retweeted
WATCH: A small trailer in the run up to today's panel discussion at 8.30pm IST organized by @SwarajyaMag
SystemC retweeted
Follow us for some interesting updates on opensource RISCV Verification.
Accellera Systems Initiative UVM 1.2 Proceeds to IEEE Standardization tinyurl.com/mp98ylx
Accellera Systems Initiative UVM 1.2 Proceeds to IEEE Standardization Quote Sheet tinyurl.com/lvch5dj
Justin Refice Receives Accellera Systems Initiative Technical Excellence Award tinyurl.com/odc3hc5
Accellera Systems Initiative Forms Portable Stimulus Working Group tinyurl.com/mzbtmrl
Accellera Systems Initiative Forms Portable Stimulus Working Group - Quote sheet tinyurl.com/l6fx2es
SystemC retweeted
Passing the buck in SystemVerilog systemverilog.net/2014/12/03/pas…
SystemC retweeted
#DVConEurope day1. 14 tutorials. Something for everyone. Low power for me. #upf #accellera #snps @DVConEurope - ytri
A tutorial on UVM-SystemC at DVCon Europe 2014
SystemC retweeted
Martin Barnisconi opens #DVConEurope.
Intel's Shishpal Rawat: Multiple hats, Singular focus bit.ly/1mVViC5
SystemC retweeted
The discussion is heating up: "@systemC: Should Verification and Design be done in same language? linkedin.com/groupItem?view…"
Should Verification and Design be done in same language? linkedin.com/groupItem?view…
Did you know that SystemVerilog DPI interface adds a significant C/C++ function call overhead? Vlang is ABI compatible with C/C++.
When the last performance penny matters, Vlang allows you to integrate assembly code in your verification platform. semiwiki.com/forum/content/…
Tudor Timi @TudorTimi
827 Followers 92 Following Verification Engineer by day, Verification Gentleman by night. Tweets may contain snark and/or sarcasm.
yushen.eth ⛩️ @Haaby698097
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Didi Craze @DidiCraze_MW
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TechyTalky @cipher_sherlock
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Akshit Thakur @thakurakshit45
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Kel @xkelz_78
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Coralie Rogers @coralierogers
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GAURAV @adiitrack
39 Followers 257 Following Sr. MTS @Circuitsutra || Virtual Prototype|| Architecture exploration|| Performance Modelling || CU Boulder | NIT Mizoram
Tutu @TutuFing
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LAPND @LAPND
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Girish @Girish__3
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Autherous @Autherous
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101 Followers 776 Following
safjkdsjgj @safjkdsjgj
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Vimal Manivannan @vimalyohen
296 Followers 4K Following Verification Engineer #semicon-professional.
Neha R @nrjxx__
30 Followers 372 Following
Induction Healthcare ... @InductionHQ
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Sabırlı Yatırımc�... @salih_arslann
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dipesh makwana @dipeshmkwana
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ZACH’S CARE @zachscare
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Hanley Consulting @HanleyConsultng
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Harpreet Bhatia @etchbhatia
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Diego Stéfano @stefano_fonseca
11 Followers 391 Following
AI Acceleration @RizwanTariqSye1
57 Followers 488 Following AI and Crypto Enthusiast, Tea-aholic Insta: rizwan_tariqs
Vishal Chovatiya @0Chovatiya
12 Followers 108 Following
Priyanshu Mishra @Priyans57411485
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Northern Care Allianc... @NCADigital
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Tudor Timi @TudorTimi
827 Followers 92 Following Verification Engineer by day, Verification Gentleman by night. Tweets may contain snark and/or sarcasm.
AMIQ EDA @amiq_eda
3K Followers 848 Following An EDA company. Software that enables hardware design and verification engineers to increase the speed and quality of chip development.
Prasanna Venkatesan @MylaiPrasanna
112 Followers 55 Following
murielle lacombled @abileapty
206 Followers 1K Following Founder @abileapty: #outsourcing #sales #businessdevelopment #services 4 #EDA #software #IP usedby #industrials #electronic & #InternetofThings #IoT best #ROI
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Ramdas @ramdas2m
863 Followers 714 Following
🇺🇦 Andrei Alexa... @incomputable
15K Followers 427 Following Please refer to my website for bio and contact information.
Potential Ventures @PVCocotb
326 Followers 296 Following Creators of Cocotb, the open source Python verification framework for RTL designs.
Standard C++ @isocpp
37K Followers 24 Following Standard C++ Foundation, and ISO C++ standards committee - ISO/IEC JTC1/SC22/WG21
EDA Playground @EDAPlayground
2K Followers 146 Following Free IDE for SystemVerilog, Verilog, VHDL, Specman, C++/SystemC, MyHDL, and Migen. Run simulations and view waves in your web browser.
Daniel Payne @Daniel_J_Payne
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34 Followers 65 Following
Arasan Chip Systems @ArasanIP
585 Followers 437 Following Arasan Chip Systems is a world-leading supplier of #SoC Intellectual Property Solutions for Mobile Storage & Connectivity. #semiIP #EDA #semiconductor #SemiEDA
Greg White @icverification
18 Followers 46 Following Loigic Verification Consulting in Silicon Valley - System Verilog, Vera and Specman + Training in HDL Design and Verification
Danny Kalev @DannyKalev
619 Followers 10 Following Phd in linguistics. C++, C, Objective-C expert. Author and tech editor of several C++ textbooks.
amit sharma @am_its
245 Followers 438 Following EDA technologist; Proud father of two amazing daughters; wannabe long distance runner; passionate Tennis player and a Murakami fan!
シーメンスEDA @mentor_japan
334 Followers 188 Following シーメンスEDA は、EDA（電子設計の自動化）のテクノロジ・リーダーとして、実績のあるソフトウェア・ツールと業界をリードする技術を提供して設計とシステムレベルのスケーリングにおける課題に対応することで、次世代テクノロジノード移行の際にも、より予測可能な結果をもたらすことを確実なものとします。
Paul McLellan @paulmclellan
927 Followers 717 Following Semiconductor, EDA, IP, lithography, embedded software, electronics, mobile. EDAgraffiti covers it all.
Kazuhiro Maeda @hwhaskell
126 Followers 115 Following 半導体/集積回路/アナログ回路/デジタル回路/回路設計/FPGA/プログラミング/C++/Haskell/エンベデッドシステム/HPC/日本酒/焼肉/FPS/スープラ リプライかD投げてくれるとフォロー返ししやすいです。
Guido van Rossum @gvanrossum
288K Followers 480 Following Python's BDFL-emeritus, Distinguished Engineer at Microsoft, Computer History Fellow, fully vaccinated. Opinions are my own. He/him.
Cadence EMEA @Cadence_EMEA
2K Followers 556 Following Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise.
Dave Orecchio @dorecchio
5K Followers 5K Following Owner Bristol Strategy, A @hubspot Gold partner. We help businesses grow using Inbound Marketing and the Hubspot growth platform. #HubPartner @HighTechMkt
Jack Donovan @txdonovan
202 Followers 244 Following Retired System, IC, and SW engineer and manager; Currently full time travel blogger and traveler
Team Verify @teamverify
251 Followers 122 Following Cadence's Team Verify: All Formal, mixed engine, and assertion based verification, all the time!
Yatin Trivedi @ytrivedi
708 Followers 87 Following
Scott Roland @scott_roland
184 Followers 97 Following Expat. Engineer. Consultant. Traveler. Blogger.
TeamESL Cadence @TeamESL
18 Followers 4 Following
TechBites Verify @tb_verification
97 Followers 22 Following http://t.co/d1mfdQgvOg community for verification topics including simulation, testbenches, formal, analog, languages and standards.
IEEEComputerSoc @IEEEComputerSoc
12K Followers 197 Following The IEEE Computer Society Chapter in Silicon Valley promotes professional association advancing technology for the benefit of humanity.
Paul Marriott, PhD. p... @pmarriott
1K Followers 1K Following Senior Pre-Silicon Verification Engineer
ABV Conf by Mentor @ABVconf
165 Followers 321 Following Mentor Graphics Conference on Assertion-Based Verification - #ABVconf; 1/19/10 with Harry Foster and Cliff Cummings. Follow for future dates!
Tom Fitzpatrick @TomAtMentor
464 Followers 36 Following Verification Technologist at Mentor Graphics; design and verification expert using SystemVerilog; developing, educating and writing about industry standards.
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575 Followers 600 Following
Brian Bailey @brian_esl
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Dennis Brophy @dennisbrophy
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74 Followers 907 Following
Dave Rich @dave_59
2K Followers 237 Following Verification Technologist, Verilog/SystemVerilog, Father of Four Boys, Husband of one Wife
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528 Followers 623 Following Writes verification software and prose. Likes to engage in cycling, photography, guitar
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492 Followers 122 Following All e & Specman, all the time. We like finding bugs, developing advanced verification methodologies, and long walks in the rain.Trends for United States
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