BobSeghers @BobSeghers
Expert CEO for scale-up tech companies Musician / Music Producer Comics/Cartoons/Animation Lover bobseghers.be Belgium Joined February 2011-
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BobSeghers retweeted
I you are @58_59DAC come visit us, we have a cool demo and some warm gifts to give away!
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Happy to see so many familiar and proud faces at @Sigasi in these pictures. A strategic result of the support of @vlaio for +3 years. Congratz to everyone of the team and in particular to Hendrik Eeckhaut to leading this team for 14 years as @Sigasi's CTO
Congratz to everyone at @Sigasi ! This amazing step forward has been several years in the making and will offer a premium #hardware #design experience to many new #engineers on the #vscode platform. businesswire.com/news/home/2021…
Today is my last day as #CEO / Executive Director of @Sigasi. Thank you for 4 years of working a great international team of colleagues, scaling up a very promising “maverick” company in the #EDA industry and supporting the industry within @58thDAC and @DSPValley
BobSeghers retweeted
Today we released Sigasi Studio 4.11 which brings VHDL 2019 support, improved block diagrams and much more ... Read the full release notes: insights.sigasi.com/releasenotes/s…
BobSeghers retweeted
#dvcon2021 is almost here and we look forward to meet you: sigasi.com/news/join_us_a…
BobSeghers retweeted
Another Year, Another Birthday ... Sigasi turned 13 today. We continue to work on improving your productivity and have a great gift ready for those who respond quickly. Numbers are limited, so apply now ! sigasi.com/boost
BobSeghers retweeted
Ever wondered how to include files from other projects in SystemVerilog? The following article explains how easy it is in Sigasi Studio. insights.sigasi.com/tech/systemver…
proud on our growing team and international partners to have #Sigasi nominated in Deloitte's Technology Fast 50 in Belgium www2.deloitte.com/be/en/pages/te…
BobSeghers retweeted
Sigasi Studio 4.9 brings another set of improvements. Our speed, memory and caching performance got better, and we have implemented new VHDL and (System)Verilog improvements and linting checks. Read the full release notes insights.sigasi.com/releasenotes/s…
BobSeghers retweeted
Sigasi is pleased to announce that we will be exhibiting at the virtual FPGA-Conference 2020, which will be taking place on the 29th-30th September. Further information and registration for the digital conference can be found at fpga-conference.eu/en/home
We are pleased to be working with Xilinx on integrating the Sigasi SDK into their Vivado Design Suite businesswire.com/news/home/2020…
BobSeghers retweeted
We have just released Sigasi Studio 4.8 with improved responsiveness of our editor and faster feedback, read more on our release notes: insights.sigasi.com/releasenotes/s…
BobSeghers retweeted
Come and visit our virtual booth at the Global STAC Live online event. Live now. "How to boost your productivity in FPGA/ASIC design and verification" on June 3 at 5pm CEST (3pm GMT) by our CTO Hendrik Eeckhaut
BobSeghers retweeted
Exceptional times require exceptional service ... If you are experiencing issues to use your Sigasi Studio license when working remotely, kindly fill out the form on our website, and we will be happy to send you a temporary node-locked license. sigasi.com/news/exception…
BobSeghers retweeted
Join us at #DVCon2020 Stop by booth No. 301 at DVCon, where we show our most recent developments in HDL based design and verification. We’d love to get your feedback. sigasi.com/news/join_us_a…
BobSeghers retweeted
We are at #EmbeddedWorld2020 in Nuremberg and hope to see you there. You can find us in Hall 4 / 4-560, we brought some cool giveaways!
BobSeghers retweeted
We have just released Sigasi Studio 4.6 with a faster new (System)Verilog preprocessor, improved graphics, bug fixes and much more. Read the full release notes: insights.sigasi.com/releasenotes/s…
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