Marvell Technology @MarvellTech
Essential technology, done right™ Data Center & Cloud | Carrier | Enterprise marvell.com Santa Clara, CA Joined August 2009-
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Custom silicon is transforming the data center. At the Custom AI Investor Event, Marvell shared how advances in SerDes, optics and XPU designs are driving a $94B opportunity by 2028. Explore full replay: mrvl.co/4g7mF9b
PCIe is the dominant protocol for chip-to-chip connections—and in the AI era, it will combine with optics to scale systems. At @CIOE_Shenzhen 2025, Annie Liao will highlight PCIe + optics innovations including PCIe 7 over optical. Learn more: mrvl.co/4nb8hzk
AI and cloud workloads demand precision. In benchmarking with @Keysight, the Marvell Teralynx® 10 with auto-load balancing cut workload completion to 2.25ms — with up to 40% fewer switches and 33% fewer networking layers. See more: mrvl.co/3HjnAGa
CXL is moving from theory to practice. @MarvellTech's Structera is now validated with @AMD and @intel CPUs and DDR4/DDR5 from @MicronTech, @Samsung, and @SKhynix. Structera A > near-memory accelerator for AI/HPC Structera X > memory-expansion controller for multi-terabyte…
In this video, Marvell intern Tiffany Vo offers up big thanks to her supervisor Rohan Gandhi for creating an environment where experimentation isn’t just allowed, it’s encouraged. Learn more about Marvell student and new graduate programs here: mrvl.co/3xxGeWy
At Hot Chips 2025, one theme was clear: memory is shaping the future of AI. That’s why Marvell is leaning into industry-changing innovations. Each layer is a step toward unlocking the scale AI models demand. Get more information about the shift here: mrvl.co/4lW2Zqn…
Marvell announced Structera™ CXL® controllers and accelerators have completed interoperability testing with DDR4 & DDR5 memory from @MicronTech, @Samsung and @SKhynix—making Structera the only CXL 2.0 family validated across major CPU and memory platforms. Read more:…
Marvell will join CIOE 2025 to explore advanced optical technology for next-generation AI data centers. Henry “Yan” Chen will present at the Advanced Optical Technology Development for Ultra-Large-Scale Intelligent Computing Clusters Forum. Details: mrvl.co/4nb8hzk
Marvell will join iFOC 2025 to discuss the future of silicon photonics and optical interconnects. Lian Qin, AVP of driver and coherent platforms, will moderate and present sessions on optoelectronic chips and high-speed AI interconnects. Learn more: mrvl.co/4fVYiey…
Experts from @UNH_IOL, @MarvellTech, and Xinnor recently explored #NVMexpress (#NVMe) compliance and interoperability testing as well as real-world use cases in our latest webinar. Watch the recording on our YouTube channel to learn more: bit.ly/45D5RC4
Collaboration is key to accelerating India’s semiconductor ecosystem. Marvell will be at SEMICON India 2025. Visit us at booth #1675 to learn how we’re driving innovation and supporting the next phase of India’s semiconductor journey. Event details here: mrvl.co/45BvRz7
Marvell kicked off its “Today I Learned” series with intern Manik Sethi. He learned that even in advanced technology, long-term success depends on supporting the human side. Learn more about Marvell student and new graduate programs by visiting: mrvl.co/3xxGeWy
. @MarvellTech LiquidSecurity Fortifies @Azure Cloud HSM: @Microsoft selects Marvell's LiquidSecurity HSMs for the Azure Cloud HSM service meeting surging demand for HSMs due to increasing cyberattacks & strict compliance regulations igit.me/Ye6e0 @StevenDickens3 $MRVL
Marvell introduces the industry’s first 64 Gbps/wire bi-directional die-to-die interface IP in 2nm. Delivering 3x UCIe bandwidth density, reduces interface power consumption by up to 75% with normal workloads and it sets a new standard for AI infrastructure. Read more:…
Silicon photonics is becoming central to #AI infrastructure. At #SEMICON Taiwan 2025, Andrew Yick, senior director of product and test engineering at Marvell, will present “Silicon Photonics Comes of Age: Scaling Test for the AI Era.” Details: mrvl.co/4mYtUm5
Marvell at AI Infra Summit 2025 The AI Infra Summit brings together leaders to explore how infrastructure is evolving to meet large‑scale AI demands. Marvell will participate in two sessions. Get full details here: mrvl.co/41l4CX4
Robot Racing 2025 brought speed, creativity and collaboration to Santa Clara. Employees had one hour to build robots before competing in fast-paced races that showcased innovation, teamwork and strategy. Thanks to everyone who joined us.
The chiplet ecosystem is advancing with greater standardization, integration strategies and ecosystem growth. In this @SemiEngineering roundtable, Mark Kuemerle shares why standard chiplets are gaining momentum — and where the market is headed: mrvl.co/3HuSk7G
AI workloads are moving beyond one-size-fits-all infrastructure. Marvell is enabling this shift with custom silicon — from XPUs and attach chips to memory innovations — plus @nvidia's NVLink® Fusion and UALink™ scale-up solutions. Read more in @CounterPointTR:…
Marvell has been named to the @CDP A-List for Supplier Engagement for 2024 — a first-time recognition that reflects leadership in climate targets, risk management and proactive supplier engagement. Read how these initiatives are helping shape a more sustainable future:…
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