VirginCMOS @VirginCMOS

#RTLDesign | #FPGAs #ASICs #SoC | #Verilog #VHDL | #C #Python | #AssemblyLanguage Universe Joined December 2017

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Marcelo Samsoniuk @samsoniuk

3 months ago

wow! I was searching for this classic book! 🔥 it describes the logic for a PC-like MB but powered by a 68000 processor! it include examples of lots of 68k-like circuits, we well interfaces for keyboard, serial, parallel and even floppy disk! 😮 bitsavers.org/pdf/peripheral…

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VirginCMOS @VirginCMOS

4 months ago

FPGA engineers often need a broader skill set than ASIC designers- major toolchains, ARM/RISCV/softcore processors, all major HDLs, HLS, C/Python/Rust, scripting (Shell, Perl, TCL), and even testbenches—since many teams skip hiring a dedicated verification crew. Is it right?

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Adam Taylor @ATaylorFPGA

4 months ago

Did you know you can hit a break point and trigger an ILA, or trigger a ILA and breakpoint the software ? being able to do this is very useful when debugging applications which cross the PS/PL boundary. My latest Hackster project shows exactly how we can use this feature to…

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Marcelo Samsoniuk @samsoniuk

5 months ago

boot sector for sure! there are lots of things you need do before is possible call main(): check for multicore/multithread and lock everything except the main core, set the stack and data segments, copy rodata to data and finally call main()…

Filip Jerzy Pizło @filpizlo

5 months ago

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Matthew Venn @matthewvenn

5 months ago

ASIC is the #ASIC terminology of the week! zerotoasiccourse.com/terminology/as… In the last month, ASIC has been the 7th most popular out of 42 terms.

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logic destroyer @splinedrive

4 years ago

Ok! Ported tinyraytracer to longnano #riscv mcu @SipeedIO to compare it with my #kianv #rv32im fpga based implementation visually github.com/splinedrive/ki… 🙃😭😂 @BrunoLevy01 yours would be 20x faster with fpu but #softVersusHardCPU

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logic destroyer @splinedrive

4 years ago

If you want to run raytracer on longnano check my repo hack github.com/splinedrive/lo… tooks 10 minutes :)

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logic destroyer @splinedrive

5 months ago

Here's the new version from @samsoniuk — Bad Apple + audio running on my FPGA KianV Linux SoC… thanks to @lucasteske

logic destroyer @splinedrive

5 months ago

Here's the new version from @samsoniuk — Bad Apple + audio running on my FPGA KianV Linux SoC… thanks to @lucasteske https://t.co/SimESDc4OL

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logic destroyer @splinedrive

5 months ago

Alright, first time in a few weeks touching KianV StealthV again after my High-Speed Computer Architecture deep dive. Head is clear… I ported Bad Apple from my friend @samsoniuk to my 5-stage pipelined CPU.

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Kai Fall @kai_fall

5 months ago

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Matthew Venn @matthewvenn

6 months ago

Verification is the #ASIC terminology of the week! zerotoasiccourse.com/terminology/ve… In the last month, Verification has been the 20th most popular out of 42 terms.

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atulit @atulit_gaur

6 months ago

One man's hell is another man's heaven

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VirginCMOS @VirginCMOS

6 months ago

I have started using the MCU8051IDE open source software on my ubuntu and ARM Keil compiler on my virtual box windows. I have Proteus tool too.

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VirginCMOS @VirginCMOS

6 months ago

8051 has 21 special function registers. Which is control special operations like the RS232 communication, Timer/counter. I can remember only these 2.

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VirginCMOS @VirginCMOS

6 months ago

8051 the base varient has 128 bytes of RAM. It looks something like 127 - 7 6 5 4 3 2 1 0 . . 0 - 7 6 5 4 3 2 1 0. I should have buy an iPad/tab with a stylus to express it in a better way.