johnfpga @fpgatutorial

fpgatutorial.com Hamburg, Germany Joined August 2020

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104

HackerNoon | Learn Any Technology @hackernoon

4 years ago

"Top 4 HDL Simulators for Beginners" by @fpgatutorial hackernoon.com/top-4-hdl-simu… #fpga #asic

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johnfpga @fpgatutorial

4 years ago

Take a look at our latest SystemVerilog tutorial where we talk about parameterized modules and generate statements #fpga #systemverilog fpgatutorial.com/systemverilog-…

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OneSpin: A Siemens Business @OneSpinSolution

4 years ago

Lieben Sie RISC-V? In this piece for #German publication @aeaktuell, @NicolaeTusinsc1 explores the #verification of #RISC_V cores, #security, #functionalcorrectness, #opensource challenges bit.ly/2U46Uua @risc_v semiEDA #formalverification #sicherheit #funktionalität

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johnfpga @fpgatutorial

4 years ago

In this week's tutorial, we take a look at SystemVerilog tasks #fpga #systemverilog fpgatutorial.com/systemverilog-…

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johnfpga @fpgatutorial

4 years ago

In our latest SystemVerilog tutorial we look at functions and how we can use them to write reusable code. #fpga #systemverilog fpgatutorial.com/systemverilog-…

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johnfpga @fpgatutorial

4 years ago

This week we take a look at the different types of loop which we can use in SystemVerilog #fpga #systemverilog fpgatutorial.com/systemverilog-…

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Altera @AlteraFPGA_

4 years ago

Intel® Agilex™ FPGAs with high-performance Crypto Blocks target Infrastructure Processing Units (IPUs), SmartNICs, and 5G Networks intel.ly/3gWNaQO

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johnfpga @fpgatutorial

4 years ago

In our latest post on SystemVerilog for FPGA design we look at the if statement and case statements #fpga #systemverilog fpgatutorial.com/systemverilog-…

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HighLevelSynthesis @HighLevelSynth1

4 years ago

Digital System Design with #Xilinx #VitisHLS for #FPGA highlevel-synthesis.com/2021/03/29/hig… @DigilentInc @Avnet @XilinxEMEA @XilinxInc @IntelFPGA @hipeac @2021Fpl @silexica @silexicaJapan @cathalmccabe @FPGA_BOT @fpgatutorial @ATaylorCEngFIET @splinedrive @CindyZou10

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johnfpga @fpgatutorial

4 years ago

Check out our latest tutorial post where we talk about the different types of always block which can be used in SystemVerilog #fpga #systemverilog fpgatutorial.com/systemverilog-…

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Introducing the #XACC_TechTalk summer series on #Xilinx Adaptive Compute. First two sessions will cover FPGA OS Abstractions, Data centric programming and #Vitis UDP, TCP/IP and distributed ML from #ETHZ and Xilinx speakers. Register free: bit.ly/xacc_tt

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RISC-V International @risc_v

4 years ago

We love a #RISCV tutorial! Learn how to install a #RISCV #processor on your FPGA board: bit.ly/3bJ4Q0l

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YosysHQ @YosysHQ

4 years ago

Heya o/ Check out our latest blog post on our new Appnote! Also, we now have a blog (blog.yosyshq.com) and write appnotes (yosyshq.readthedocs.io/en/latest/appn…). blog.yosyshq.com/p/ap120/

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johnfpga @fpgatutorial

4 years ago

Nice introductory article on using Xilinx multi-gigabit transceivers adiuvoengineering.com/post/microzed-…

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Unai @unaimarcor

4 years ago

To all the VHDL people out there, do you now about IEEE-P1076.gitlab.io? That's the site of the VHDL Analysis and Standardisation Group (VASG). We are gathering and organising Bug Reports and Capability/Feature Request for the next revision of the language (202X). Come by!

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Juan Gonzalez @Obijuan_cube

4 years ago

VideoBlog. Capítulo 54: FPGAs y Constantes. Colección iceK (3/4). Ejemplos hola mundo en diferentes placas youtu.be/UWahee_PGdI

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RISC-V International @risc_v

4 years ago

Learn about how to build a #RISCV CPU from scratch. @ten_filip of @IEEESpectrum walks you through how to do this here: bit.ly/3fKVsdH

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YosysHQ @YosysHQ

4 years ago

🧑‍💻Our next interview guest will be @wavedrom! wavedrom.com/editor.html?%7…

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johnfpga @fpgatutorial

4 years ago

In this week's post we look at continuous assignment and how we can use it to model combinational logic in SystemVerilog #fpga #systemverilog fpgatutorial.com/systemverilog-…

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STH @ServeTheHome

4 years ago

The Xilinx Kria KV260 FPGA-based Video AI Development Kit is a huge step in bringing FPGA solutions to a wider developer community servethehome.com/xilinx-kria-kv… @XilinxInc #FPGA #AI